This relates to integrated circuits and more particularly, to systems for performing constraint based bitstream compression using hardware in integrated circuit devices such as programmable integrated circuits.
Programmable integrated circuits (e.g., field programmable gate arrays) are a type of integrated circuit that can be programmed by a user to implement a desired custom logic function. In a typical scenario, a logic designer uses computer-aided design tools to design a custom logic circuit that performs custom logic functions. When the design process is complete, the computer-aided design tools generate configuration data. The configuration data is loaded into memory elements to configure the devices to perform the functions of the custom logic circuit. Memory elements are often formed using random-access-memory (RAM) cells. Because the RAM cells are loaded with configuration data during device programming, the RAM cells are sometimes referred to as configuration memory or configuration random-access-memory cells (CRAM).
When a programmable integrated circuit is powered up, the content of these RAM cells is replaced with data (e.g., configuration data) from non-volatile devices (e.g., flash memory or micro-processor devices). This process is called bit-stream loading. The programmable interconnect circuit is traditionally required to remain idle during configuration bit-stream loading operations. In order to minimize idle time of the programmable integrated circuit, it would be desirable to improve the loading time of the configuration bitstream onto the programmable integrated circuit.